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ASIC & FPGA Design Engineer

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ASIC & FPGA Design Engineer

Grand prairie, TX

Design Engineer
Temporary
Job Description

Design, develop, verify, and integrate ASIC and FPGA solutions supporting advanced aerospace and defense programs. Translate system requirements into programmable logic designs while leading architecture, verification, hardware integration, and laboratory testing activities. Collaborate with multidisciplinary engineering teams to deliver reliable digital hardware throughout the complete development lifecycle.

    • Job Details
    • Manufacturing
    • 4/10A-1st Shift
    • Must be a U.S. Citizen
    • Education & Job Requirements
    • Bachelor's degree in Electrical Engineering or a closely related STEM field
    • Master's degree preferred
    • 3+ years of professional experience with FPGA design and simulation verification or a related discipline
    • Develop HDL designs using VHDL, Verilog, and/or SystemVerilog
    • Utilize Xilinx/AMD Vivado, Vitis, and Vitis HLS toolsets with UltraScale design methodology
    • Operate FPGA simulation tools including Synopsys VCS
    • Apply digital design principles including timing analysis, clock domain crossing, and signal integrity
    • Support high-speed interfaces including AXI, Ethernet, TCP/IP, PCIe, and serial protocols
    • Demonstrate laboratory debugging experience using high-speed oscilloscopes, spectrum analyzers, and signal generators
    • Utilize Synopsys EDA tools
    • Able to read, write, speak, and understand the English language
    • Ability to read, interpret, and apply technical drawings, blueprints, schematics, or maintenance manuals
    • Preferred Skills
    • Experience supporting missile programs
    • Experience with LM/MFC design environments
    • Experience using SystemVerilog, Verilog, C/C++, MATLAB/Simulink, Synopsys Synplify, Synopsys VCS, NCSim, and ChipScope toolsets
    • Experience with Xilinx/AMD and MicroSemi/Microchip FPGA families, FPGA fabric, and IP
    • Experience implementing NSA algorithms including AES and counter mode
    • Experience managing configuration control using GitLab
    • Experience with Vivado and Vitis FPGA toolsets
    • Experience with UVM and Simulink/HDL Coder integration
    • Experience using digital oscilloscopes, spectrum analyzers, power meters, signal generators, and other electronic test equipment
    • Experience troubleshooting and debugging FPGA hardware at the board level
    • Experience supporting the complete ASIC/FPGA lifecycle including architecture, design, simulation, verification, validation, integration, and testing
    • Strong communication, collaboration, and presentation skills
    • Knowledge of controls and digital loop-closure applications
    • Networking experience with Ethernet switches, routers, firewalls, tcpdump, and Wireshark
    • Active DoD Secret or Top Secret clearance
    • Job Duties & Functions
    • Define ASIC and FPGA architectures and design specifications
    • Develop RTL using VHDL, Verilog, and SystemVerilog
    • Implement synthesis, place-and-route, and timing closure strategies
    • Create simulation models, verification environments, and test plans
    • Lead hardware-in-the-loop (HIL) testing and board-level integration activities
    • Perform timing analysis, power budgeting, and FPGA resource utilization studies
    • Manage configuration control using GitLab or equivalent version control systems
    • Produce design documentation including specifications, test plans, verification reports, and release packages
    • Collaborate with systems, software, hardware, mechanical, manufacturing, test, and quality engineering teams
    • Mentor junior engineers on FPGA development, verification, and configuration management best practices
    • TeamGlobal Benefits
    • Medical, Dental, Vision, 401(k), and more!
    • TG Rewards Program
    • Employee Referral Program



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